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Integrated Device Technology, Inc.
128K x 32 CMOS STATIC RAM MODULES
DESCRIPTION:
IDT7MP4060 IDT7MP4095
FEATURES:
* High density 4 megabit static RAM modules * Low profile 64-pin ZIP (Zig-zag In-line vertical Package), 64-lead, 72-lead SIMMs (Single In-line Memory Modules) * Fast access time: 15ns (max.) * Surface mounted plastic components on an epoxy laminate (FR-4) substrate * Single 5V (10%) power supply * Multiple GND pins and decoupling capacitors for maximum noise immunity * Inputs/outputs directly TTL compatible * Gold plated fingers on the SIMM version
PIN CONFIGURATION - 7MP4095
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 GND PD1 I/O8 I/O9 I/O10 I/O11 A0 A1 A2 I/O12 I/O13 I/O14 I/O15 GND A15
CS2
PD0 I/O0 I/O1 I/O2 I/O3 VCC A7 A8 A9 I/O4 I/O5 I/O6 I/O7
WE
A14
CS1 CS3
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64
PD0 - OPEN PD1 - OPEN
The IDT7MP4095/7MP4060 are 128K x 32 static RAM modules constructed on an epoxy laminate (FR-4) substrate using four 128K x 8 static RAMs in plastic SOJ packages. The IDT7MP4095/7MP4060 are available with access times as fast as 15ns with minimal power consumption. The IDT7MP4095 is packaged in a 64-pin FR-4 ZIP (Zigzag In-line vertical Package) or a 64-lead SIMM (Single In-line Memory Module). The IDT7MP4060 is packaged in a 72-lead SIMM. The ZIP configuration allows 64 pins to be placed on a package 3.65 inches long and 0.21 inches thick. At only 0.60 inches high, this low-profile package is ideal for systems with minimum board spacing, while the SIMM configuration allows use of edge mounted sockets to secure the module. All inputs and outputs of the IDT7MP4095/7MP4060 are TTL compatible and operate from a single 5V supply. Full asynchronous circuitry requires no clocks or refresh for operation and provides equal access and cycle times for ease of use.
FUNCTIONAL BLOCK DIAGRAM
CS1 CS2 CS3 CS4
ADDRESS
WE OE
17
128K x 32 RAM
CS4
A16 GND I/O16 I/O17 I/O18 I/O19 A10 A11 A12 A13 I/O20 I/O21 I/O22 I/O23 GND
NC
OE
8
8
8
8
3147 drw 01
I/O24 I/O25 I/O26 I/O27 A3 A4 A5 VCC A6 I/O28 I/O29 I/O30 I/O31
I/O0-31
PIN NAMES
I/O0-31 A0-16 Data Inputs/Outputs Addresses Chip Selects Write Enable Output Enable Power Ground No Connect
3147 tbl 01
CS1-4 WE OE
VCC GND NC
ZIP, SIMM TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
(c)1996 Integrated Device Technology, Inc. For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
SEPTEMBER 1996
DSC-3147/7
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IDT7MP4060/7MP4095 128K x 32 CMOS STATIC RAM MODULES
COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATION - 7MP4060
NC PD3 PD0 I/O0 I/O1 I/O2 I/O3 VCC A7 A8 A9 I/O4 I/O5 I/O6 I/O7 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 WE 32 A14 34 CS1 36
CS3
CAPACITANCE (TA = +25C, F = 1.0MHz)
Symbol Parameter(1) Input Capacitance (Data and CS) Input Capacitance (Address, WE, OE) Output Capacitance Conditions V(IN) = 0V V(IN) = 0V V(OUT) = 0V Max. 12 40 12 Unit pF pF pF
3147 tbl 04
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71
NC PD2 GND PD1 I/O8 I/O9 I/O10 I/O11 A0 A1 A2 I/O12 I/O13 I/O14 I/O15 GND A15
CS2 CS4
PD0 - OPEN PD1 - OPEN PD2 - OPEN PD3 - GND
CIN(D) CIN(A) COUT
NOTE: 1. This parameter is guaranteed by design but not tested.
RECOMMENDED DC OPERATING CONDITIONS
Symbol VCC GND VIH VIL Parameter Supply Voltage Supply Voltage Input High Voltage Input Low Voltage Min. 4.5 0 2.2 -0.5
(1)
Typ. 5.0 0 -- --
Max. 5.5 0 5.8 0.8
Unit V V V V
3147 tbl 05
A16 GND I/O16 I/O17 I/O18 I/O19 A10 A11 A12 A13 I/O20 I/O21 I/O22 I/O23 GND NC NC
38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72
NC
OE
I/O24 I/O25 I/O26 I/O27 A3 A4 A5 VCC A6 I/O28 I/O29 I/O30 I/O31 NC NC
3147 drw 13
NOTE: 1. VIL (min) = -3.0V for pulse width less than 10ns.
RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE
Grade Commercial Ambient Temperature 0C to +70C GND 0V VCC 5.0V 10%
3147 tbl 06
TRUTH TABLE
Mode Standby Read Write Read
CS OE WE
Output High Z DATAOUT DATAIN High-Z
Power Standby Active Active Active
3147 tbl 02
H L L L
X L X H
X H L H
SIMM TOP VIEW
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM TA TBIAS TSTG IOUT Rating Terminal Voltage with Respect to GND Operating Temperature Temperature Under Bias Storage Temperature DC Output Current Value -0.5 to +7.0 0 to +70 -10 to +85 -55 to +125 50 Unit V C C C mA
NOTES: 3147 tbl 03 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
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IDT7MP4060/7MP4095 128K x 32 CMOS STATIC RAM MODULES
COMMERCIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS
(VCC = 5.0V 10%, TA = 0C to +70C)
Symbol |ILI| |ILI| |ILO| VOL VOH Parameter Input Leakage (Data and CS) Input Leakage (Address, WE, and OE) Output Leakage Output Low Output High VCC = Max.; CS = VIH, VOUT = GND to VCC VCC = Min., IOL = 8mA VCC = Min., IOH = -4mA -- -- 2.4 10 0.4 -- A V V VCC = Max.; VIN = GND to VCC -- 40 A Test Conditions VCC = Max.; VIN = GND to VCC Min. -- Max. 10 Unit A
Symbol ICC ISB ISB1
Parameter Dymanic Operating Current Standby Supply Current Full Standby Supply Current
Test Conditions f = fMAX; CS = VIL VCC = Max.; Output Open VIH, VCC = Max. Outputs Open, f = fMAX
CS CS VCC - 0.2V; f = 0 VIN > VCC - 0.2V or < 0.2V
Max. 760 160 60
Unit mA mA mA
3147 tbl 07
AC TEST CONDITIONS
Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load GND to 3.0V 5ns 1.5V 1.5V See Figures 1 and 2
3147 tbl 08
+5 V
+5 V
480 DATA OUT 255 DATA OUT 30 pF* 255
480
5 pF*
* Includes scope and jig. Figure 1. Output Load
3147 drw 03
Figure 2. Output Load (for tOLZ, tOHZ, tCHZ, tCLZ, tWHZ, tOW)
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IDT7MP4060/7MP4095 128K x 32 CMOS STATIC RAM MODULES
COMMERCIAL TEMPERATURE RANGE
AC ELECTRICAL CHARACTERISTICS
(VCC = 5V 10%, TA = 0C to +70C)
-15 Symbol Parameter Read Cycle tRC tAA tACS tCLZ(1) tOE tOLZ(1) tCHZ(1) tOHZ tOH tPU(1) tPD
(1) (1)
-20 Max. -- 15 15 -- 8 -- 8 8 -- -- 15 -- -- -- -- -- -- 8 -- -- -- Min. 20 -- -- 3 -- 0 -- -- 3 0 -- 20 18 18 0 18 3 -- 12 0 3 Max. -- 20 20 -- 10 -- 12 12 -- -- 20 -- -- -- -- -- -- 13 -- -- -- Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
3147 tbl 10
Min. 15 -- -- 3 -- 0 -- -- 3 0 -- 15 12 12 0 12 0 -- 10 0 3
Read Cycle Time Address Access Time Chip Select Access Time Chip Select to Output in Low Z Output Enable to Output Valid Output Enable to Output in Low Z Chip Deselect to Output in High Z Output Disable to Output in High Z Output Hold from Address Change Chip Select to Power-Up Time Chip Deselect to Power-Down Time Write Cycle Time Chip Select to End of Write Address Valid to End of Write Address Set-up Time Write Pulse Width Write Recovery Time
(1)
Write Cycle tWC tCW tAW tAS tWP tWR tWHZ tDW tDH tOW(1)
Write Enable to Output in High Z Data to Write Time Overlap Data Hold from Write Time Output Active from End of Write
NOTE: 1. This parameter is guaranteed by design, but not tested.
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IDT7MP4060/7MP4095 128K x 32 CMOS STATIC RAM MODULES
COMMERCIAL TEMPERATURE RANGE
TIMING WAVEFORM OF READ CYCLE NO. 1(1)
t RC ADDRESS t AA
OE
t OE
CS
t OH
t OLZ t ACS t CLZ (5)
(5)
t OHZ (5) t CHZ (5)
DATA OUT
3147 drw 04
TIMING WAVEFORM OF READ CYCLE NO. 2(1,2,4)
t RC ADDRESS t AA t OH DATA OUT PREVIOUS DATA VALID t OH DATA VALID
3147 drw 05
TIMING WAVEFORM OF READ CYCLE NO. 3(1,3,4)
CS
t ACS t CLZ DATA OUT
(5)
t CHZ
(5)
3147 drw 06
NOTES: 1. WE is High for Read Cycle. 2. Device is continuously selected. CS = VIL. 3. Address valid prior to or coincident with CS transition low. 4. OE = VIL. 5. Transition is measured 200mV from steady state. This parameter is guaranteed by design, but not tested.
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IDT7MP4060/7MP4095 128K x 32 CMOS STATIC RAM MODULES
COMMERCIAL TEMPERATURE RANGE
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (WE CONTROLLED TIMING)(1, 2, 3, 7) WE
t WC ADDRESS
OE
t AW
CS
tAS
WE
t WP
(7)
t WR
t WHZ (6) t OHZ DATA OUT
(4) (6)
t OHZ (6) t OW
(6) (4)
t DH t DW DATA VALID
3147 drw 07
DATA IN
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CS CONTROLLED TIMING)(1, 2, 3, 5) CS
t WC ADDRESS t AW
CS
tAS
WE
tCW
t WR
t DW DATA IN
t DH DATA VALID
3147 drw 08
NOTES: 1. WE or CS must be high during all address transitions. 2. A write occurs during the overlap (tWP) of a low CS and a low WE. 3. tWR is measured from the earlier of CS or WE going high to the end of write cycle. 4. During this period, I/O pins are in the output state, and input signals must not be applied. 5. If the CS low transition occurs simultaneously with or after the WE low transition, the outputs remain in a high impedance state. 6. Transition is measured 200mV from steady state with a 5pF load (including scope and jig). This parameter is guaranteed by design, but not tested. 7. If OE is low during a WE controlled write cycle, the write pulse width must be the larger of tWP or (tWHZ + tDW).
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IDT7MP4060/7MP4095 128K x 32 CMOS STATIC RAM MODULES
COMMERCIAL TEMPERATURE RANGE
PACKAGE DIMENSIONS - IDT7MP4095 SIMM VERSION
3.840 3.860 3.574 3.594
0.210 MAX.
0.620 0.640 0.250 TYP. FRONT VIEW 0.050 TYP. 0.045 0.055 SIDE VIEW
0.240 0.260
PIN 1 0.070 0.090
0.390 0.410
0.062 R BACK VIEW 0.060 0.064 PIN 1
3147 drw 09
ZIP VERSION
3.640 3.660 0.600 MAX. 0.100 TYP. 0.100 TYP. FRONT VIEW 0.050 TYP. 0.125 0.175 SIDE VIEW
0.210 MAX.
PIN 1
0.015 0.025
0.250 TYP.
BACK VIEW
3147 drw 10
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IDT7MP4060/7MP4095 128K x 32 CMOS STATIC RAM MODULES
COMMERCIAL TEMPERATURE RANGE
PACKAGE DIMENSIONS - IDT7MP4060
FRONT VIEW SIDE VIEW
0.640 0.660
4.240 4.260 3.974 3.994
0.210 MAX
0.240 0.260 0.070 0.090
PIN 1 0.250 TYP 0.050 TYP
0.390 0.410
0.045 0.055
0.062 R 0.060 R 0.064 BACK VIEW PIN 1
3147 drw 11
ORDERING INFORMATION
IDT XXXXX Device Type X Power X Speed X Package X Process/ Temperature Range Blank Commercial (0C to +70C)
M Z 15 20
FR-4 SIMM (Single In-line Memory Module) FR-4 ZIP (Zig-zag In-line Package)
Speed in Nanoseconds
S
Standard Power
IDT7MP4060 128K x 32 Static RAM Module (SIMM only) IDT7MP4095 128K x 32 Static RAM Module
3147 drw 12
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